Publication result detail

Design Sychronization after Partial Dynamic Reconfiguration of Fault Tolerant System

MIČULKA, L.; KOTÁSEK, Z.

Original Title

Design Sychronization after Partial Dynamic Reconfiguration of Fault Tolerant System

English Title

Design Sychronization after Partial Dynamic Reconfiguration of Fault Tolerant System

Type

Paper in proceedings outside WoS and Scopus

Original Abstract

This paper is focused to present the methods of design synchronization after the partial dynamic reconfiguration of FPGA and also there was introduced a new method inspired from one widely used.

English abstract

This paper is focused to present the methods of design synchronization after the partial dynamic reconfiguration of FPGA and also there was introduced a new method inspired from one widely used.

Keywords

FPGA, reconfiguration, synchronization

Key words in English

FPGA, reconfiguration, synchronization

Authors

MIČULKA, L.; KOTÁSEK, Z.

RIV year

2013

Released

20.06.2012

Publisher

IEEE Computer Society

Location

Cesme-Izmir

ISBN

978-3-902457-33-2

Book

15th Euromicro Conference on Digital System Design: Architectures, Methods and Tools

Pages from

20

Pages to

21

Pages count

2

BibTex

@inproceedings{BUT97023,
  author="Lukáš {Mičulka} and Zdeněk {Kotásek}",
  title="Design Sychronization after Partial Dynamic Reconfiguration of Fault Tolerant System",
  booktitle="15th Euromicro Conference on Digital System Design: Architectures, Methods and Tools",
  year="2012",
  pages="20--21",
  publisher="IEEE Computer Society",
  address="Cesme-Izmir",
  isbn="978-3-902457-33-2"
}