Publication result detail

Optimization of Wire Loop Formation in Wirebonding Process Using Computer Simulation

PSOTA, B.; SZENDIUCH, I.; BURŠÍK, M.

Original Title

Optimization of Wire Loop Formation in Wirebonding Process Using Computer Simulation

English Title

Optimization of Wire Loop Formation in Wirebonding Process Using Computer Simulation

Type

Paper in proceedings (conference paper)

Original Abstract

This paper informs about the simulation of the wirebonding process. We are primary focus on a loop formation and definition of the wire behavior during this process. Simulation model of the bonding structure was created and the definition of the loop shape for different application was gained.

English abstract

This paper informs about the simulation of the wirebonding process. We are primary focus on a loop formation and definition of the wire behavior during this process. Simulation model of the bonding structure was created and the definition of the loop shape for different application was gained.

Keywords

wirebonding, simulation, ANSYS, FEA, packaging

Key words in English

wirebonding, simulation, ANSYS, FEA, packaging

Authors

PSOTA, B.; SZENDIUCH, I.; BURŠÍK, M.

RIV year

2013

Released

13.05.2012

Publisher

IEEE Xplore digital library

Location

Vienna University of Technology Gusshausstrasse 27-29 A-1040 WIEN - Austria

ISBN

978-1-4673-2241-6

Book

2012 35th International Spring Seminar on Electronics Technology (ISSE)

ISBN

2161-2528

Periodical

Conference proceedings (International Spring Seminar on Electronics Technology)

Volume

35

Number

1

State

United States of America

Pages from

282

Pages to

285

Pages count

3

URL

BibTex

@inproceedings{BUT93615,
  author="Boleslav {Psota} and Ivan {Szendiuch} and Martin {Buršík}",
  title="Optimization of Wire Loop Formation in Wirebonding Process Using Computer Simulation",
  booktitle="2012 35th International Spring Seminar on Electronics Technology (ISSE)",
  year="2012",
  journal="Conference proceedings (International Spring Seminar on Electronics Technology)",
  volume="35",
  number="1",
  pages="282--285",
  publisher="IEEE Xplore digital library",
  address="Vienna University of Technology
Gusshausstrasse 27-29
A-1040 WIEN - Austria",
  isbn="978-1-4673-2241-6",
  issn="2161-2528",
  url="http://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=6273122&contentType=Conference+Publications&searchField%3DSearch_All%26queryText%3DNic%C3%A1k"
}