Applied result detail

HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware

ZACHARIÁŠOVÁ, M.; LENGÁL, O.; KAJAN, M.

Original Title

HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware

English Title

HAVEN: An Open Framework for FPGA-Accelerated Functional Verification of Hardware

Type

Software

Abstract

A framework compliant with current prevalent functional verification methodologies (OVM, UVM) that enables to accelerate functional verification of hardware components in an FPGA environment, thus significantly increasing performance of verification.

Abstract in English

A framework compliant with current prevalent functional verification methodologies (OVM, UVM) that enables to accelerate functional verification of hardware components in an FPGA environment, thus significantly increasing performance of verification.

Keywords

functional verification, SystemVerilog, FPGA, acceleration, NetCOPE

Key words in English

functional verification, SystemVerilog, FPGA, acceleration, NetCOPE

Location

Nástroj i dokumentaci lze získat na URL http://www.fit.vutbr.cz/~isimkova/haven/ (http://www.fit.vutbr.cz/%7Eisimkova/haven/)

Licence fee

In order to use the result by another entity, it is always necessary to acquire a license

www

https://www.fit.vut.cz/research/product/234/