Design of FPGA-Based Dependable Systems

Design of FPGA-Based Dependable Systems

Paper in proceedings outside WoS and Scopus

In this paper, the new methodology from areas fault tolerant systems based on automated generation of checkers in FPGA is presented. Dependability models of architectures based on the use of on-line checkers are described in the paper as well. First, the results of our research in the area of on-line checkers design are described. It is shown how the architectures with on-line checkers can be used in implementing dependable systems into FPGA and required dependability parameters. It is shown how the dependability parameters are derived from the architecture of the system and used for the design of dependable systems into XILINX FPGA.

In this paper, the new methodology from areas fault tolerant systems based on automated generation of checkers in FPGA is presented. Dependability models of architectures based on the use of on-line checkers are described in the paper as well. First, the results of our research in the area of on-line checkers design are described. It is shown how the architectures with on-line checkers can be used in implementing dependable systems into FPGA and required dependability parameters. It is shown how the dependability parameters are derived from the architecture of the system and used for the design of dependable systems into XILINX FPGA.

on-line checkers, fault tolerant systems, dependable systems, dependability parameters, dependability models, FPGA

on-line checkers, fault tolerant systems, dependable systems, dependability parameters, dependability models, FPGA

STRAKA, M.; KOTÁSEK, Z.

2010

14.10.2008

Masaryk University

Znojmo

978-80-7355-082-0

4th Doctoral Workshop on Mathematical and Engineering Methods in Computer Science

240

247

8

https://www.fit.vut.cz/research/publication/8758/

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