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Detail publikačního výsledku
PEČENKA, T.; KOTÁSEK, Z.
Original Title
I-path Scheduling Algorithm for RT Level Circuits
English Title
Type
Paper in proceedings outside WoS and Scopus
Original Abstract
In the paper, a new approach for scheduling i-paths in Register Transfer (RT) level circuits is presented. The proposed algorithm is able to schedule i-paths not only in circuit structure, but also in time. At the beginning, the formal model for modelling data-path of structurally described RT level circuits is defined. This model is then used to define the i-path concept. The main part of the paper is devoted to introduce a method for i-path scheduling. The method is able to monitor component utilization in time and it is able to detect and solve conflicts between i-paths.
English abstract
Keywords
i-path, scheduling, backtracking
Key words in English
Authors
Released
27.10.2006
Location
Mikulov
ISBN
80-214-3287-X
Book
MEMICS 2006 2nd Doctoral Workshop on Mathematical and Engineering Methods in Computer Science
Pages from
174
Pages to
181
Pages count
8
Full text in the Digital Library
http://hdl.handle.net/
BibTex
@inproceedings{BUT22284, author="Tomáš {Pečenka} and Zdeněk {Kotásek}", title="I-path Scheduling Algorithm for RT Level Circuits", booktitle="MEMICS 2006 2nd Doctoral Workshop on Mathematical and Engineering Methods in Computer Science", year="2006", pages="174--181", address="Mikulov", isbn="80-214-3287-X" }