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EYSSELT, M.
Original Title
The Perfect Microinstruction Pipeline with Microprogram Counters
English Title
Type
Paper in proceedings outside WoS and Scopus
Original Abstract
The paper presents quite original results of the research activities on a rate-enhance of computers. The attention was paid to the control units with the microprogram counter addressing of a control store in the item of the overlapping of FETCH and EXECUTION phases of microinstruction cycles. The only one condition variable is to be tested in one microprogram cycle. The perfect overlapping of FETCH and EXECUTION phases of microinstruction cycles was achieved via the adaption of a control store. The control store is doubled and the both halves of the control store have their own microprogram counter. The principle of an autoincrement (implicit) addressing of linear sections of microprograms is maintained.
English abstract
Keywords
microinstruction, microoperation, microprogram, microprogram counter, control store, overlapping, pipelining, microinstruction pipeline
Key words in English
Authors
Released
01.01.1996
Publisher
unknown
Location
September 26-27, Košice-Herĺany
Book
Proceedings of the Scientific Conference with International Participation ELECTRONIC COMPUTERS & INFORMATICS
Pages from
176
Pages to
181
Pages count
6
BibTex
@inproceedings{BUT192211, author="Miloš {Eysselt}", title="The Perfect Microinstruction Pipeline with Microprogram Counters", booktitle="Proceedings of the Scientific Conference with International Participation ELECTRONIC COMPUTERS & INFORMATICS", year="1996", pages="176--181", publisher="unknown", address="September 26-27, Košice-Herĺany" }