Publication result detail

The Concept of Pseudo Evolvable Hardware

SEKANINA, L.; DRÁBEK, V.

Original Title

The Concept of Pseudo Evolvable Hardware

English Title

The Concept of Pseudo Evolvable Hardware

Type

Paper in proceedings outside WoS and Scopus

Original Abstract

Evolvable hardware is a new technology, where circuit connection is subject to evolution. The model of the evolvable circuit is used in the task of image compression. This work is done with evolvable hardware at function level. Possible hardware implementations are discussed and a new concept of constrained evolution - pseudo evolvable hardware - is opened. This paper describes the implementation principle of a virtual evolvable machine on top of a normal FPGA. In this way, the current FPGAs can implement evolvable circuit.

English abstract

Evolvable hardware is a new technology, where circuit connection is subject to evolution. The model of the evolvable circuit is used in the task of image compression. This work is done with evolvable hardware at function level. Possible hardware implementations are discussed and a new concept of constrained evolution - pseudo evolvable hardware - is opened. This paper describes the implementation principle of a virtual evolvable machine on top of a normal FPGA. In this way, the current FPGAs can implement evolvable circuit.

Keywords

pseudo evolvable hardware, reconfigurable circuit

Key words in English

pseudo evolvable hardware, reconfigurable circuit

Authors

SEKANINA, L.; DRÁBEK, V.

Released

01.01.2000

Publisher

unknown

Location

Elsevier Science Ltd. Oxford

ISBN

0-08-043620-X

Book

IFAC Workshop on Programmable Devices and Systems 2000

Pages count

6

BibTex

@inproceedings{BUT191615,
  author="Lukáš {Sekanina} and Vladimír {Drábek}",
  title="The Concept of Pseudo Evolvable Hardware",
  booktitle="IFAC Workshop on Programmable Devices and Systems 2000",
  year="2000",
  pages="6",
  publisher="unknown",
  address="Elsevier Science Ltd. Oxford",
  isbn="0-08-043620-X"
}