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PEČENKA, T.; KOTÁSEK, Z.; STRNADEL, J.
Original Title
Improving Testability Parameters of Pipelined Circuits Through the Identification of Testable Cores
English Title
Type
Paper in proceedings outside WoS and Scopus
Original Abstract
A new methodology of selecting registers into scan chain is presented. It is based on the identification of testable cores. The methodology is supposed to be used preferably for pipelined circuits consisting of a high number of stages. In the paper, the idea of testable cores is illustrated and defined. The method based on a genetic algorithm is described and verified on several typical pipelined circuits. Experimental results are discussed and summarized in the table. At the end of the paper, conclusions and future research perspectives are indicated.
English abstract
Keywords
scan methods, testability, controlability/observability, testable core
Key words in English
Authors
Released
22.04.2004
Publisher
Slovak Academy of Science
Location
Bratislava
ISBN
80-969117-9-1
Book
Proc. of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems
Pages from
99
Pages to
104
Pages count
6
URL
http://www.fit.vutbr.cz/~pecenka/pubs/2004_ddecs.pdf
BibTex
@inproceedings{BUT17148, author="Tomáš {Pečenka} and Zdeněk {Kotásek} and Josef {Strnadel}", title="Improving Testability Parameters of Pipelined Circuits Through the Identification of Testable Cores", booktitle="Proc. of the 7th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems", year="2004", pages="99--104", publisher="Slovak Academy of Science", address="Bratislava", isbn="80-969117-9-1", url="http://www.fit.vutbr.cz/~pecenka/pubs/2004_ddecs.pdf" }