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SHARANG, S.; DLUHOŠ, J.; KALASOVÁ, D.; DENISYUK, A.; VÁŇA, R.; ZIKMUND, T.; KAISER, J.; OBONA, J.
Original Title
In-depth Analysis of 10 nm Exynos Processor using Micro CT and FIB-SEM System
English Title
Type
Paper in proceedings (conference paper)
Original Abstract
Latest technology nodes have made finer, more precise physical failure analysis techniques to emerge. Conventional techniques for larger technology nodes are slowly becoming ineffective. In this paper, we discuss effective yet non-invasive technique like micro CT where we get high fidelity images of the Exynos processor and complement it with further analysis using FIB-SEM systems-based preparation techniques like site-specific homogenous delayering, in-situ probing and TEM lamella preparation which enables failure analysis and reverse engineering techniques like nanoprobing and TEM imaging possible.
English abstract
Keywords
Delayering, Micro CT, TEM, FIB-SEM, Nanoprobing.
Key words in English
Authors
RIV year
2020
Released
02.07.2019
ISBN
978-1-7281-3552-6
Book
IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits
Pages from
1
Pages to
4
Pages count
URL
http://www.ipfa-ieee.org/
BibTex
@inproceedings{BUT157871, author="S. {Sharang} and Jiří {Dluhoš} and Dominika {Kalasová} and Andrey {Denisyuk} and Rostislav {Váňa} and Tomáš {Zikmund} and Jozef {Kaiser} and Jozef Vincenc {Obona}", title="In-depth Analysis of 10 nm Exynos Processor using Micro CT and FIB-SEM System", booktitle="IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits", year="2019", pages="1--4", isbn="978-1-7281-3552-6", url="http://www.ipfa-ieee.org/" }