Publication detail

High-Speed anomaly detection system using entropy calculation on FPGA

SMÉKAL, D. BLAŽEK, P.

Original Title

High-Speed anomaly detection system using entropy calculation on FPGA

Type

conference paper

Language

English

Original Abstract

This article discusses the use of entropy calculation on Field Programmable Gate Array (FPGA) for identifying anomalies in data communication. The article is focused on three type of entropy and described hardware-accelerated network card based on field programmable gate array, concretely NFB-40G2 card using the NetCOPE development platform and its properties.

Keywords

anomaly; DDoS; entropy; FPGA; network attack; Rényi; Shannon; Tsallis

Authors

SMÉKAL, D.; BLAŽEK, P.

Released

27. 4. 2017

Publisher

Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií

Location

Brno

ISBN

978-80-214-5496-5

Book

Proceedings of the 23rd Conference STUDENT EEICT 2017

Edition number

první

Pages from

415

Pages to

419

Pages count

5

URL

http://eeict.feec.vutbr.cz/2017/sbornik/EEICT_2017-sbornik-komplet-2.pdf

BibTex

@inproceedings{BUT135122,
  author="David {Smékal} and Petr {Blažek}",
  title="High-Speed anomaly detection system using entropy calculation on FPGA",
  booktitle="Proceedings of the 23rd Conference STUDENT EEICT 2017",
  year="2017",
  number="první",
  pages="415--419",
  publisher="Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií",
  address="Brno",
  isbn="978-80-214-5496-5",
  url="http://eeict.feec.vutbr.cz/2017/sbornik/EEICT_2017-sbornik-komplet-2.pdf"
}