Compact Library of Efficient Polymorphic Gates based on Ambipolar Transistors

Compact Library of Efficient Polymorphic Gates based on Ambipolar Transistors

Paper in proceedings (conference paper)

Main goal of this paper is to propose a compact library of polymorphic gates based on suitable type of reconfigurable transistors. In fact, their exploitation brings a significant advantage for space-efficient synthesis of complex polymorphic circuits. Actual behaviour of those transistors closely depends on so called ambipolar property. That particular aspect simply allows the selection of n- or p- channel operating mode of the transistor structures which is controlled by means of switching the voltage level at a dedicated control electrode.

The gates were developed by an evolution approach using Cartesian genetic programming. Various discrete switch-level ambipolar transistor models extended by taking into account the threshold voltage drop degradation effect were used. A diverse range of polymorphic gates were designed, which clearly shows significant transistor savings compared to the conventional approaches. Finally, the individual components that belong to the library also suggest the opportunity how to considerably reduce the target size of complex polymorphic circuits.

Main goal of this paper is to propose a compact library of polymorphic gates based on suitable type of reconfigurable transistors. In fact, their exploitation brings a significant advantage for space-efficient synthesis of complex polymorphic circuits. Actual behaviour of those transistors closely depends on so called ambipolar property. That particular aspect simply allows the selection of n- or p- channel operating mode of the transistor structures which is controlled by means of switching the voltage level at a dedicated control electrode.

The gates were developed by an evolution approach using Cartesian genetic programming. Various discrete switch-level ambipolar transistor models extended by taking into account the threshold voltage drop degradation effect were used. A diverse range of polymorphic gates were designed, which clearly shows significant transistor savings compared to the conventional approaches. Finally, the individual components that belong to the library also suggest the opportunity how to considerably reduce the target size of complex polymorphic circuits.

Polymorphic gate, ambipolar transistor, digital circuit, Polymorphic electronics, HSPICE simulation.

Polymorphic gate, ambipolar transistor, digital circuit, Polymorphic electronics, HSPICE simulation.

NEVORAL, J.; ŠIMEK, V.; RŮŽIČKA, R.

2018

04.04.2017

IEEE Circuits and Systems Society

Palma de Mallorca

978-1-5090-6376-5

2017 12th International Conference on Design & Technology of Integrated Systems in Nanoscale Era (DTIS)

155

160

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