Publication result detail

Design of Novel CMOS DCCII with Reduced Parasitics and its All-Pass Filter Applications

ARSLAN, E.; PAL, K.; HERENCSÁR, N.; METIN, B.

Original Title

Design of Novel CMOS DCCII with Reduced Parasitics and its All-Pass Filter Applications

English Title

Design of Novel CMOS DCCII with Reduced Parasitics and its All-Pass Filter Applications

Type

WoS Article

Original Abstract

In this paper, a novel translinear loop based, high performance Complementary Metal-Oxide-Semiconductor (CMOS) second-generation differential current conveyor (DCCII) is introduced. By using super source follower transistors, very low equivalent impedances are obtained at input terminals xn and xp. In addition, new voltage-mode (VM) and current-mode (CM) first-order all-pass filters (APFs) are proposed to highlight the performance of the designed CMOS DCCII. The designed CMOS implementation is simulated with HSpice using AMS 0.35 µm real process parameters. It consumes only 1.3 mW power with using +/- 1.25 V power supply voltages. The simulation results of the proposed CMOS DCII circuit and the experimental results for designed VM APF are in very good agreement with the theoretical ones.

English abstract

In this paper, a novel translinear loop based, high performance Complementary Metal-Oxide-Semiconductor (CMOS) second-generation differential current conveyor (DCCII) is introduced. By using super source follower transistors, very low equivalent impedances are obtained at input terminals xn and xp. In addition, new voltage-mode (VM) and current-mode (CM) first-order all-pass filters (APFs) are proposed to highlight the performance of the designed CMOS DCCII. The designed CMOS implementation is simulated with HSpice using AMS 0.35 µm real process parameters. It consumes only 1.3 mW power with using +/- 1.25 V power supply voltages. The simulation results of the proposed CMOS DCII circuit and the experimental results for designed VM APF are in very good agreement with the theoretical ones.

Keywords

Analog signal processing, all-pass filter, current-mode, voltage-mode, DCCII, reduced parasitic, super source follower, translinear loop

Key words in English

Analog signal processing, all-pass filter, current-mode, voltage-mode, DCCII, reduced parasitic, super source follower, translinear loop

Authors

ARSLAN, E.; PAL, K.; HERENCSÁR, N.; METIN, B.

RIV year

2017

Released

19.12.2016

Publisher

Kaunas University of Technology

ISBN

1392-1215

Periodical

Elektronika Ir Elektrotechnika

Volume

22

Number

6

State

Republic of Lithuania

Pages from

46

Pages to

50

Pages count

5

URL

https://eejournal.ktu.lt/index.php/elt/article/view/17222

Full text in the Digital Library

http://hdl.handle.net/11012/204282

BibTex

@article{BUT128291,
  author="Emre {Arslan} and Kirat {Pal} and Norbert {Herencsár} and Bilgin {Metin}",
  title="Design of Novel CMOS DCCII with Reduced Parasitics and its All-Pass Filter Applications",
  journal="Elektronika Ir Elektrotechnika",
  year="2016",
  volume="22",
  number="6",
  pages="46--50",
  doi="10.5755/j01.eie.22.6.17222",
  issn="1392-1215",
  url="https://eejournal.ktu.lt/index.php/elt/article/view/17222"
}

Documents

17222-Article Text-50280-1-10-20161214