Applied result detail

VHDL Detector IP Core

MUSIL, P.; MUSIL, M.; ZEMČÍK, P.; JURÁNEK, R.

Original Title

VHDL Detector IP Core

English Title

VHDL Detector IP Core

Type

Functioning sample

Abstract

The firmware is written in VHDL and its purpose is to configure FPGA circuit so that it detect objects in video using WaldBoost method with scaled video. This implementation is a high-perfrmance one that works on a video stream on-the-fly without any need of external frame buffer. Firmware is optimized primarily for Xilinx Zynq SoC platform.

Abstract in English

The firmware is written in VHDL and its purpose is to configure FPGA circuit so that it detect objects in video using WaldBoost method with scaled video. This implementation is a high-perfrmance one that works on a video stream on-the-fly without any need of external frame buffer. Firmware is optimized primarily for Xilinx Zynq SoC platform.

Keywords

FPGA, VHDL, WaldBoost, object detection

Key words in English

FPGA, VHDL, WaldBoost, object detection

Location

http://www.fit.vutbr.cz/units/UPGM/prod/index.php?id=484¬itle=1

Licence fee

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