Publication detail

On NFA-Split Architecture Optimizations

KOŠAŘ, V. KOŘENEK, J.

Original Title

On NFA-Split Architecture Optimizations

Type

conference paper

Language

English

Original Abstract

The NFA-Split architecture is an efficient approach to the mapping of regular expressions to the FPGA. However, the NFA-Split architecture has some drawbacks. The most significant are the high time complexity due to usage of determinisation to detect simultaneously active states. The other one is in some cases high consumption of BRAMs. The paper presents solutions of those drawbacks. According to the results up to 39 times overall speedup of  construction of the NFA-Split architecture was achieved. Reduction of utilized BRAMs is up to 97%.

Keywords

Regular expressions, Pattern matching, FPGA, NFA

Authors

KOŠAŘ, V.; KOŘENEK, J.

RIV year

2014

Released

23. 4. 2014

Publisher

IEEE Computer Society

Location

Warsaw

ISBN

978-1-4799-4558-0

Book

2014 IEEE 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)

Pages from

274

Pages to

277

Pages count

4

BibTex

@inproceedings{BUT111523,
  author="Vlastimil {Košař} and Jan {Kořenek}",
  title="On NFA-Split Architecture Optimizations",
  booktitle="2014 IEEE 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS)",
  year="2014",
  pages="274--277",
  publisher="IEEE Computer Society",
  address="Warsaw",
  doi="10.1109/DDECS.2014.6868808",
  isbn="978-1-4799-4558-0"
}