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Project detail
Duration: 1.3.2026 — 28.2.2027
Funding resources
Vysoké učení technické v Brně - Vnitřní projekty VUT
On the project
This project advances new applications through tailored HW/SW architectures while developing novel design methods that exploit application and platform characteristics for maximum performance and efficiency. It will create algorithms, hardware platforms, and ML-based methods for highly application-specific systems, and demonstrate their effectiveness in selected applications.
Mark
FIT-S-26-8984
Default language
Czech
People responsible
Sekanina Lukáš, prof. Ing., Ph.D. - principal person responsibleBártů Tomáš, Ing. - fellow researcherBidlo Michal, doc. Ing., Ph.D. - fellow researcherDuchoň Radek, Ing. - fellow researcherFritz Karel, Ing. - fellow researcherFučík Otto, doc. Dr. Ing. - fellow researcherHusa Rostislav, Ing. - fellow researcherHussain Yasir - fellow researcherJaroš Jiří, prof. Ing., Ph.D. - fellow researcherJaroš Marta, Ing., Ph.D. - fellow researcherKekely Lukáš, Ing., Ph.D. - fellow researcherKlhůfek Jan, Ing. - fellow researcherKořenek Jan, doc. Ing., Ph.D. - fellow researcherKuník Oliver, Ing. - fellow researcherMalik Aamir Saeed, prof., Ph.D. - fellow researcherMartínek Tomáš, doc. Ing., Ph.D. - fellow researcherMatoušek Jiří, Ing., Ph.D. - fellow researcherMihola David, Ing. - fellow researcherMrázek Vojtěch, doc. Ing., Ph.D. - fellow researcherOrsák Michal, Ing. - fellow researcherPiňos Michal, Ing. - fellow researcherPlevač Lukáš, Ing. - fellow researcherRůžička Richard, doc. Ing., Ph.D., MBA - fellow researcherSedláček Ondřej, Ing. - fellow researcherSedlák David, Ing. - fellow researcherSetinský Jiří, Ing. - fellow researcherStrnadel Josef, Ing., Ph.D. - fellow researcherSzabó Tomáš, Ing. - fellow researcherŠišmiš Lukáš, Ing. - fellow researcherTinka Jan, Ing. - fellow researcherVašíček Zdeněk, doc. Ing., Ph.D. - fellow researcherZaheer Muhammad Asad - fellow researcherZachariášová Marcela, Ing., Ph.D. - fellow researcher
Units
Department of Computer Systems- responsible department (15.6.2026 - not assigned)Department of Computer Systems- internal (1.1.2026 - 31.12.2026)Faculty of Information Technology- beneficiary (1.1.2026 - 31.12.2026)
Results
Lukáš Šišmiš, Jan Kořenek. FRAPPE: Feasibility Report on Accelerating Payload Pattern-matching Engines in Intrusion Detection Systems with FPGAs. In 2026 IEEE 29th International Symposium on Design and Diagnostics of Electronic Circuits and Systems Ddecs 2026. IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems. Institute of Electrical and Electronics Engineers Inc., 2026. p. 1-6. ISBN: 979-8-3315-8229-6.Detail
Responsibility: Sekanina Lukáš, prof. Ing., Ph.D.