Course detail

Programmable Logic Devices

FEKT-MPC-PLDAcad. year: 2023/2024

Students get more detailed knowledge in the area of digital circuits design, especially with respect to their implementation into FPGAs (or ASICs). Students get overview of current technology of these integrated circuits, their off-the-shelf architectures, principles of design and application of basic digital subsystems (counters, finite state machines, memory structures). During the PC lectures students get familiar with modern system for FPGA configuration. This includes description of the digital system (using VHDL source codes, schematic, IP cores), its implementation and verification using simulator. After passing the course students are able to design and implement simple digital system into an FPGA (using VHDL language).

Language of instruction


Number of ECTS credits


Mode of study

Not applicable.

Entry knowledge

Students are expected to know basic of impulse and digital technology: the Boolean algebra, Karnaugh maps, truth tables, function of basic gates and flip-flops (registers), principle and effect of signal propagation through active and passive transmission elements.

Rules for evaluation and completion of the course

Students obtain points for the activity in computer labs during the semester. The final exam is composed of written, practical and oral part.
Evaluation of activities is specified by a regulation, which is issued by the lecturer responsible for the course annually.


Lectures are aimed to teach students the basic principles of FPGAs, while they will be able not only to configure (program) them, but also select proper device and implement it into a system.
The graduate is able to: (a) describe simple digital system using VHDL; (b) verify simple digital system using VHDL; (c) choose type of finite state machine and give reasons for the choice; (d) design and implement a finite state machine using VHDL; (e) compare different architectures of PLDs and choose a proper one for particular application; (f) specify timing requirements for a design and verify that they are met after implementation; (g) implement simple IP cores like memories and simple DSP blocks (FIR filtres); (h) implement simple microcontroller into FPGA, program it and use in target application; (i) state requirements on FPGA power supply system; (j) analyze and prevent/solve basic signal integrity issues.

Study aids

Not applicable.

Prerequisites and corequisites

Not applicable.

Basic literature

PINKER, Jiří a Martin POUPA. Číslicové systémy a jazyk VHDL. Praha: BEN - technická literatura, 2006. ISBN 80-7300-198-5. (CS)
MAXFIELD, Clive. The design warrior's guide to FPGAs: devices, tools, and flows. Boston: Newnes/Elsevier, c2004. ISBN 9780750676045. (EN)

Recommended reading

Not applicable.


Classification of course in study plans

  • Programme MPC-TIT Master's, any year of study, summer semester, elective

  • Programme MPC-AUD Master's

    specialization AUDM-TECH , 1. year of study, summer semester, compulsory-optional
    specialization AUDM-ZVUK , 1. year of study, summer semester, compulsory-optional

  • Programme MPC-EKT Master's, 1. year of study, summer semester, compulsory-optional
  • Programme MPC-MEL Master's, 1. year of study, summer semester, compulsory-optional
  • Programme MPC-IBE Master's, 2. year of study, summer semester, compulsory-optional

Type of course unit



26 hours, optionally

Teacher / Lecturer

Exercise in computer lab

39 hours, compulsory

Teacher / Lecturer