Course detail
Digital Signal Processors
FEKT-MSPRAcad. year: 2012/2013
Definition of digital signal processor, its differences from the other microprocessors. Generations of digital signal processors and their typical features, trends of development. Basic digital signal processor architectures – harvard architecture, VLIW architecture. Fixed- and floating-point number formats, IEEE-754 standard. Fixed-point digital signal processors series TMS320C6400 series. Processor core, functional units, register set, addressing modes. Instruction set and the way it is applied. Link between programming in assembler and in the C language, intrinsics function, pragma expressions. Canonic and non-canonic structures for implementing FIR and IIR digital filters in digital signal processors, analysis of quantization noise, Mason rule, transfer function modification regarding fixed-point representation. Adaptive LMS algorithm and its implementation. Generation of harmonic signal and harmonic analysis, Goertzel's algorithm, structure of FFT algorithm and its types. Sum of peripherals, memory mapping, communication with external peripheries, direct memory access DMA. Real-time processing, circular buffer, double buffering.
Language of instruction
Number of ECTS credits
Mode of study
Guarantor
Department
Learning outcomes of the course unit
Prerequisites
Co-requisites
Planned learning activities and teaching methods
Assesment methods and criteria linked to learning outcomes
Test 10 points
Check exercises 10 points
Written examination 60 points
Course curriculum
2. Fixed-point and floating-point representations, representations of negative numbers, properties of fixed-point digital signal processors.
3. Architecture of digital signal processors TMS320C6400 series by Texas Instruments, processor core, functional units, registers, specific instructions.
4. Address generation unit, modulo addressing mode.
5. Program structure and writing in assembler.
6. Program structure and writing in C language, intrinsic functions, pragma directives, integrated development environment.
7. Program Controller, instruction pipeline.
8. Quantization effects on digital filters characteristics, limit cycles, optimization of digital filters in digital signal processors.
9. FIR and IIR digital filters implementation in digital signal processors.
10. Generation of harmonic signals and harmonic analysis, Goertzel algorithm, implementation of fast Fourier transform.
11. On-chip peripherials, DMA controller, interrupt controller.
12. External buses, external memory interface.
13. Floating-point digital signal processors.
Work placements
Aims
Specification of controlled education, way of implementation and compensation for absences
Computer exercise are duly
Self-dependent project is duly
Written examamination is duly
Recommended optional programme components
Prerequisites and corequisites
Basic literature
SMÉKAL, Z., VÍCH, R.: Signal Processing on Digital Signal Processors (Zpracování signálů se signálovými procesory). Radix spol. s.r.o, Praha 1998. ISBN 80-86031-18-7 (In Czech) (CS)
Recommended reading
Classification of course in study plans
- Programme EEKR-M Master's
branch M-SVE , 1 year of study, winter semester, elective interdisciplinary
branch M-TIT , 2 year of study, winter semester, elective specialised
branch M-BEI , 2 year of study, winter semester, elective interdisciplinary
branch M-EST , 2 year of study, winter semester, elective specialised - Programme EEKR-M Master's
branch M-TIT , 2 year of study, winter semester, elective specialised
branch M-SVE , 1 year of study, winter semester, elective interdisciplinary
branch M-BEI , 2 year of study, winter semester, elective interdisciplinary
branch M-EST , 2 year of study, winter semester, elective specialised - Programme EEKR-CZV lifelong learning
branch EE-FLE , 1 year of study, winter semester, elective specialised
Type of course unit
Lecture
Teacher / Lecturer
Syllabus
2. Fixed-point and floating-point representations, representations of negative numbers, properties of fixed-point digital signal processors.
3. Architecture of digital signal processors by Freescale, data arithmetic logic unit, registers, specific instructions.
4. Address generation unit, modulo addressing mode, bit-reverse addrressing mode.
5. Program Controller, instruction pipeline, hardware cycles.
6. Program structure and writing in assembler.
7. Program structure and writing in C language, intrinsic functions, pragma directives, integrated development environment.
8. Quantization effects on digital filters characteristics, limit cycles, optimization of digital filters in digital signal processors.
9. FIR and IIR digital filters implementation in digital signal processors.
10. Generation of harmonic signals and harmonic analysis, Goertzel algorithm, implementation of fast Fourier transform.
11. On-chip peripherials, DMA controller, interrupt controller.
12. External buses, external memory interface.
13. Floating-point digital signal processors. VLIW and VLES architecture.
Laboratory exercise
Teacher / Lecturer
Syllabus
2. Fixed-point arithmetic, multiplication, saturation, rounding.
3. Core of 56F8367 digital signal processor, examples of using core registers. Implementation of polynomial functions.
4. Address generation unit, implementation of lookup table functions.
5. Indirect addressing, linear and circular addressing.
6. Hardware cycles DO, implementation of FIR digital filters.
7. Implementation of IIR digital filters.
8. Bitwise reversed addressing, implementation of FFT algorithm.
9. Program control unit, implementation of interrupt services.
10. On-chip peripherals, implementation of serial communications.
11. Timer, counter, examples of usage.
12. Implementation of communication between DSP and A/D and D/A converters.
13. Classification of individual projects.