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FRÝZA, T.; MEGO, R.
Original Title
Instruction-level Programming Approach for Very Long Instruction Word Digital Signal Processors
English Title
Type
Paper in proceedings (conference paper)
Original Abstract
This paper is focused on the benefit of low-level programming of Gigital Signal Processors (DSP) with Very Long Instruction Word (VLIW) architecture. Scecifically, the process of hardware resources allocation which is outlined in text and proved by basic matrix benchmarks. Compare to available library functions, the proposed results decrease the number of execution cycles by tens of percent for smaller matrix dimensions and help developers to solve critical parts of their applications in the instruction-level approach.
English abstract
Keywords
DSP, VLIW, instruction-level, low-level, matrix, assembly, C6678
Key words in English
Authors
RIV year
2019
Released
01.02.2018
Location
Batumi, Georgia
ISBN
978-1-5386-1911-7
Book
Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2017)
Pages from
518
Pages to
521
Pages count
4
URL
https://ieeexplore.ieee.org/document/8292060/
BibTex
@inproceedings{BUT141212, author="Tomáš {Frýza} and Roman {Mego}", title="Instruction-level Programming Approach for Very Long Instruction Word Digital Signal Processors", booktitle="Proceedings of the 24th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2017)", year="2018", pages="518--521", address="Batumi, Georgia", doi="10.1109/ICECS.2017.8292060", isbn="978-1-5386-1911-7", url="https://ieeexplore.ieee.org/document/8292060/" }
Documents
PID5100635