Detail publikace

Hardware-Accelerated Cryptography for Software-Defined Networks

CÍBIK P.

Originální název

Hardware-Accelerated Cryptography for Software-Defined Networks

Anglický název

Hardware-Accelerated Cryptography for Software-Defined Networks

Jazyk

en

Originální abstrakt

This paper presents a Software-Defined Network (SDN) cryptographic solution targeted on high-speed smart Network Interface Cards (NICs) with an FPGA chip. This solution provides a fast alternative method to develop network-oriented data processing cryptography applications for an accelerator. A high-level programming language - Programming Protocol-independent Packet Processor (P4) - is used to avoid a complex and time-consuming hardware development. The solution consists of two main parts: a library of mainly used cryptographic primitives written in VHSIC Hardware Description Language (VHDL) i.e. a symmetric cipher (AES-GCM-256), a hash function (SHA-3), a SHA-3-based Hash-based Message Authentication Code (HMAC), a digital signature scheme (EdDSA) and a post-quantum digital signature scheme (Dilithium), and a compiler P4/VHDL with the support for these cryptographic components as external objects of P4_16.

Anglický abstrakt

This paper presents a Software-Defined Network (SDN) cryptographic solution targeted on high-speed smart Network Interface Cards (NICs) with an FPGA chip. This solution provides a fast alternative method to develop network-oriented data processing cryptography applications for an accelerator. A high-level programming language - Programming Protocol-independent Packet Processor (P4) - is used to avoid a complex and time-consuming hardware development. The solution consists of two main parts: a library of mainly used cryptographic primitives written in VHSIC Hardware Description Language (VHDL) i.e. a symmetric cipher (AES-GCM-256), a hash function (SHA-3), a SHA-3-based Hash-based Message Authentication Code (HMAC), a digital signature scheme (EdDSA) and a post-quantum digital signature scheme (Dilithium), and a compiler P4/VHDL with the support for these cryptographic components as external objects of P4_16.

Dokumenty

BibTex


@inproceedings{BUT171913,
  author="Peter {Cíbik}",
  title="Hardware-Accelerated Cryptography for Software-Defined Networks",
  annote="This paper presents a Software-Defined Network (SDN) cryptographic solution targeted on high-speed smart Network Interface Cards (NICs) with an FPGA chip. This solution provides a fast alternative method to develop network-oriented data processing cryptography applications for an accelerator. A high-level programming language - Programming Protocol-independent Packet Processor (P4) - is used to avoid a complex and time-consuming hardware development. The solution consists of two main parts: a library of mainly used cryptographic primitives written in VHSIC Hardware Description Language (VHDL) i.e. a symmetric cipher (AES-GCM-256), a hash function (SHA-3), a SHA-3-based Hash-based Message Authentication Code (HMAC), a digital signature scheme (EdDSA) and a post-quantum digital signature scheme (Dilithium), and a compiler P4/VHDL with the support for these cryptographic components as external objects of P4_16.",
  booktitle="Proceedings of the 27th Conference STUDENT EEICT 2021",
  chapter="171913",
  howpublished="online",
  year="2021",
  month="april",
  pages="126--130",
  type="conference paper"
}