Publication result detail

Automatic Design of Image Operators Using Evolvable Hardware

SEKANINA, L.; DRÁBEK, V.

Original Title

Automatic Design of Image Operators Using Evolvable Hardware

English Title

Automatic Design of Image Operators Using Evolvable Hardware

Type

Paper in proceedings outside WoS and Scopus

Original Abstract

An original approach to automatic design of image operators is presented in this paper. The proposed solution employs evolvable hardware at simplified functional level and produces image operators (digital circuits), which can compete against traditional designs in terms of quality and implementation cost in Xilinx's chips.

English abstract

An original approach to automatic design of image operators is presented in this paper. The proposed solution employs evolvable hardware at simplified functional level and produces image operators (digital circuits), which can compete against traditional designs in terms of quality and implementation cost in Xilinx's chips.

Keywords

evolvable hardware, image operators, evolutionary design, FPGA

Key words in English

evolvable hardware, image operators, evolutionary design, FPGA

Authors

SEKANINA, L.; DRÁBEK, V.

RIV year

2011

Released

22.04.2002

Publisher

Brno University of Technology

Location

Brno

ISBN

80-214-2094-4

Book

Proc. of 5th IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop

Pages from

132

Pages to

139

Pages count

8

URL

http://www.fit.vutbr.cz/~sekanina/publ/ddecs02/ddecs02.pdf

BibTex

@inproceedings{BUT9821,
  author="Lukáš {Sekanina} and Vladimír {Drábek}",
  title="Automatic Design of Image Operators Using Evolvable Hardware",
  booktitle="Proc. of 5th IEEE Design and Diagnostics of Electronic Circuits and Systems Workshop",
  year="2002",
  pages="132--139",
  publisher="Brno University of Technology",
  address="Brno",
  isbn="80-214-2094-4",
  url="http://www.fit.vutbr.cz/~sekanina/publ/ddecs02/ddecs02.pdf"
}