Publication result detail

Dependability Analysis of Fault Tolerant Systems Based on Partial Dynamic Reconfiguration Implemented into FPGA

KAŠTIL, J.; STRAKA, M.; MIČULKA, L.; KOTÁSEK, Z.

Original Title

Dependability Analysis of Fault Tolerant Systems Based on Partial Dynamic Reconfiguration Implemented into FPGA

English Title

Dependability Analysis of Fault Tolerant Systems Based on Partial Dynamic Reconfiguration Implemented into FPGA

Type

Paper in proceedings outside WoS and Scopus

Original Abstract

In this paper, a dependability analysis of fault tolerant systems implemented into the SRAM-based FPGA is presented. The fault tolerant architectures are based on redundancy of functional units associated with a concurrent error detection technique and it uses the principles of partial dynamic reconfiguration as a recovery mechanism from a fault occurrence. Architectures are tested by injecting soft errors into partial bitstream in FPGA by SEU injector and the faults coverage of this architecture is obtained. From faults coverage, the failure rate and repair rate are evaluated. Then, for fault tolerant architecture the Markov dependability models are created and it is demonstrated how the reliability and availability parameters are derived from this model for different configurations of architectures and faulty modules. The reliability analysis results are shown.

English abstract

In this paper, a dependability analysis of fault tolerant systems implemented into the SRAM-based FPGA is presented. The fault tolerant architectures are based on redundancy of functional units associated with a concurrent error detection technique and it uses the principles of partial dynamic reconfiguration as a recovery mechanism from a fault occurrence. Architectures are tested by injecting soft errors into partial bitstream in FPGA by SEU injector and the faults coverage of this architecture is obtained. From faults coverage, the failure rate and repair rate are evaluated. Then, for fault tolerant architecture the Markov dependability models are created and it is demonstrated how the reliability and availability parameters are derived from this model for different configurations of architectures and faulty modules. The reliability analysis results are shown.

Keywords

dependability, reliability, model, FPGA, fault tolerant system, architecture, reconfiguration

Key words in English

dependability, reliability, model, FPGA, fault tolerant system, architecture, reconfiguration

Authors

KAŠTIL, J.; STRAKA, M.; MIČULKA, L.; KOTÁSEK, Z.

RIV year

2013

Released

10.05.2012

Publisher

IEEE Computer Society

Location

Cesme-Izmir

ISBN

978-0-7695-4798-5

Book

15th Euromicro Conference on Digital System Design: Architectures, Methods and Tools

Pages from

250

Pages to

257

Pages count

8

URL

https://www.fit.vut.cz/research/publication/10037/

BibTex

@inproceedings{BUT96980,
  author="Jan {Kaštil} and Martin {Straka} and Lukáš {Mičulka} and Zdeněk {Kotásek}",
  title="Dependability Analysis of Fault Tolerant Systems Based on Partial Dynamic Reconfiguration Implemented into FPGA",
  booktitle="15th Euromicro Conference on Digital System Design: Architectures, Methods and Tools",
  year="2012",
  pages="250--257",
  publisher="IEEE Computer Society",
  address="Cesme-Izmir",
  isbn="978-0-7695-4798-5",
  url="https://www.fit.vut.cz/research/publication/10037/"
}

Documents

Kastil_12_Q3