Publication result detail

Behavioral Analysis for Testability on VHDL Source File

KOTÁSEK, Z.; RŮŽIČKA, R.

Original Title

Behavioral Analysis for Testability on VHDL Source File

English Title

Behavioral Analysis for Testability on VHDL Source File

Type

Paper in proceedings outside WoS and Scopus

Original Abstract

The goal of the research activities the results of which are presentedin this paper is to experiment with the VHDL resulting RTL/gate levelstructures. The results of experiments with different types of VHDLstatements are behavioral source text and analyse the summarised.

English abstract

The goal of the research activities the results of which are presentedin this paper is to experiment with the VHDL resulting RTL/gate levelstructures. The results of experiments with different types of VHDLstatements are behavioral source text and analyse the summarised.

Keywords

behaviorální analýza testovatelnosti číslicových obvodů

Key words in English

behaviorální analýza testovatelnosti číslicových obvodů

Authors

KOTÁSEK, Z.; RŮŽIČKA, R.

Released

01.01.2000

Publisher

Slovak Academy of Science

Location

Bratislava

ISBN

80-968320-3

Book

Proceedings of Design and Diagnostics of Electronic Circuits and Systems Workshopsborník konference IEEE DDECS

Pages from

209

Pages to

212

Pages count

4

BibTex

@inproceedings{BUT191917,
  author="Zdeněk {Kotásek} and Richard {Růžička}",
  title="Behavioral Analysis for Testability on VHDL Source File",
  booktitle="Proceedings of Design and Diagnostics of Electronic Circuits and Systems Workshopsborník konference IEEE DDECS",
  year="2000",
  pages="209--212",
  publisher="Slovak Academy of Science",
  address="Bratislava",
  isbn="80-968320-3"
}