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SEKANINA, L.; FRIEDL, Š.
Original Title
On Routine Implementation of Virtual Evolvable Devices Using COMBO6
English Title
Type
Paper in proceedings outside WoS and Scopus
Original Abstract
This paper introduces an approach showing that a complete implementation of a digital evolvable hardware system can automatically be created from a high-level specification. The approach generates the implementation of a virtual reconfigurable circuit and evolutionary algorithm independently of a target platform, i.e. as a soft IP core. The method is evaluated on the development of two high-performance evolvable systems that are utilized for fast evolutionary design of small combinational circuits, such as 3x3-bit multipliers. The COMBO6 card is employed for these experiments.
English abstract
Keywords
evolvable hardware, evolutionary circuit design, COMBO6
Key words in English
Authors
RIV year
2011
Released
29.06.2004
Publisher
IEEE Computer Society Press
Location
Los Alamitos
ISBN
0-7695-2145-2
Book
Proc. of the 2004 NASA/DoD Conference on Evolvable Hardware
Pages from
63
Pages to
70
Pages count
8
URL
http://www.fit.vutbr.cz/~sekanina/publ/eh04/eh04.pdf
BibTex
@inproceedings{BUT17342, author="Lukáš {Sekanina} and Štěpán {Friedl}", title="On Routine Implementation of Virtual Evolvable Devices Using COMBO6", booktitle="Proc. of the 2004 NASA/DoD Conference on Evolvable Hardware", year="2004", pages="63--70", publisher="IEEE Computer Society Press", address="Los Alamitos", isbn="0-7695-2145-2", url="http://www.fit.vutbr.cz/~sekanina/publ/eh04/eh04.pdf" }