Publication result detail

Modelling VLSI Circuits Using Taylor Series

KOCINA, F.; NEČASOVÁ, G.; VEIGEND, P.; CHALOUPKA, J.; ŠÁTEK, V.; KUNOVSKÝ, J.

Original Title

Modelling VLSI Circuits Using Taylor Series

English Title

Modelling VLSI Circuits Using Taylor Series

Type

Paper in proceedings (conference paper)

Original Abstract

The paper introduces the capacitor substitution for CMOS logic gates, i.e. NANDs, NORs and inverters. It reveals the
necessity of a very accurate and fast method for solving this problem. Therefore the Modern Taylor Series Method (MTSM) is used which provides an automatic choice of a higher order during the computation and a larger integration step size while keeping desired accuracy.

English abstract

The paper introduces the capacitor substitution for CMOS logic gates, i.e. NANDs, NORs and inverters. It reveals the
necessity of a very accurate and fast method for solving this problem. Therefore the Modern Taylor Series Method (MTSM) is used which provides an automatic choice of a higher order during the computation and a larger integration step size while keeping desired accuracy.

Keywords

Modern Taylor Series Method, Capacitor Substitution Method, ordinary differential equations, electronic circuits

Key words in English

Modern Taylor Series Method, Capacitor Substitution Method, ordinary differential equations, electronic circuits

Authors

KOCINA, F.; NEČASOVÁ, G.; VEIGEND, P.; CHALOUPKA, J.; ŠÁTEK, V.; KUNOVSKÝ, J.

RIV year

2018

Released

21.07.2017

Publisher

American Institute of Physics

Location

Rhodes

Book

14th International Conference of Numerical Analysis and Applied Mathematics

ISBN

0094-243X

Periodical

AIP conference proceedings

Number

1863

State

United States of America

Pages from

1

Pages to

4

Pages count

4

URL

https://www.scopus.com/inward/record.uri?eid=2-s2.0-85026660763&doi=10.1063%2f1.4992513&partnerID=40&md5=0e83afba5815f966767b37db2d783622

BibTex

@inproceedings{BUT144388,
  author="Filip {Kocina} and Gabriela {Nečasová} and Petr {Veigend} and Jan {Chaloupka} and Václav {Šátek} and Jiří {Kunovský}",
  title="Modelling VLSI Circuits Using Taylor Series",
  booktitle="14th International Conference of Numerical Analysis and Applied Mathematics",
  year="2017",
  journal="AIP conference proceedings",
  number="1863",
  pages="1--4",
  publisher="American Institute of Physics",
  address="Rhodes",
  doi="10.1063/1.4992513",
  issn="0094-243X",
  url="https://www.scopus.com/inward/record.uri?eid=2-s2.0-85026660763&doi=10.1063%2f1.4992513&partnerID=40&md5=0e83afba5815f966767b37db2d783622"
}