Publication result detail

Synchronization Technique for TMR System After Dynamic Reconfiguration on FPGA

MIČULKA, L.; KOTÁSEK, Z.

Original Title

Synchronization Technique for TMR System After Dynamic Reconfiguration on FPGA

English Title

Synchronization Technique for TMR System After Dynamic Reconfiguration on FPGA

Type

Paper in proceedings outside WoS and Scopus

Original Abstract

This paper presents the methods of design synchronization after the partial dynamic reconfiguration of FPGA and introduces a new method inspired from previous one which is still used. The implementation of this method on TMR fault tolerant system component is described. Results of synchronization after reconfiguration process in Xilinx FPGA are presented.

English abstract

This paper presents the methods of design synchronization after the partial dynamic reconfiguration of FPGA and introduces a new method inspired from previous one which is still used. The implementation of this method on TMR fault tolerant system component is described. Results of synchronization after reconfiguration process in Xilinx FPGA are presented.

Keywords

FPGA, partial dynamic reconfiguration, synchronization

Key words in English

FPGA, partial dynamic reconfiguration, synchronization

Authors

MIČULKA, L.; KOTÁSEK, Z.

RIV year

2014

Released

29.03.2013

Publisher

Politecnico di Milano

Location

Avignon

ISBN

978-2-11-129175-1

Book

The Second Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN 2013)

Pages from

53

Pages to

56

Pages count

4

BibTex

@inproceedings{BUT103517,
  author="Lukáš {Mičulka} and Zdeněk {Kotásek}",
  title="Synchronization Technique for TMR System After Dynamic Reconfiguration on FPGA",
  booktitle="The Second Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN 2013)",
  year="2013",
  pages="53--56",
  publisher="Politecnico di Milano",
  address="Avignon",
  isbn="978-2-11-129175-1"
}