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2026
BAKSI, A.; BREIER, J.; CHATTOPADHYAY, A.; GERLICH, T.; GUILLEY, S.; GUPTA, N.; ISOBE, T.; JATI, A.; JEDLIČKA, P.; KIM, H.; LIU, F.; MARTINÁSEK, Z.; SAKAMOTO, K.; SEO, H.; SHIBA, R. BAKSHEESH: Similar Yet Different From GIFT (and ZORRO). IACR communications in cryptology. International Association for Cryptologic Research, 2026. iss. 4, 57 p.
Paper in proceedings outside WoS and Scopus
2024
CÍBIK, P.; DOBIÁŠ, P.; RICCI, S.; HAJNÝ, J.; MALINA, L.; JEDLIČKA, P.; SMÉKAL, D. Pushing AES-256-GCM to Limits: Design, Implementation and Real FPGA Tests. In Lecture Notes in Computer Science - Applied Cryptography and Network Security Workshops. Lecture Notes in Computer Science. Berlin: Springer, 2024. p. 303-318. ISBN: 978-3-031-61486-6. ISSN: 0302-9743.
Paper in proceedings (conference paper)
RICCI, S.; DOBIÁŠ, P.; MALINA, L.; HAJNÝ, J.; JEDLIČKA, P. Hybrid Keys in Practice: Combining Classical, Quantum and Post-Quantum Cryptography. IEEE Access, 2024, vol. 12, iss. 1, p. 23206-23219. ISSN: 2169-3536.
WoS Article
2023
JEDLIČKA, P.; HAJNÝ, J. NTT for Resources-Optimized Hardware Implementation of CRYSTALS-Kyber. Proceedings I of the 29th Student EEICT 2023. 1. Brno: Brno University of Technology, Faculty of Electrical Engineering and Communication, 2023. p. 379.ISBN: 978-80-214-6153-6.
2022
JEDLIČKA, P.; HAJNÝ, J. VHDL-based implementation of CRYSTALS-Kyber components on FPGA. In Proceedings II of the 28th Conference STUDENT EEICT 2022 Selected Papers. 1st. Brno: Brno University of Technology, Faculty of Electrical Engineering and Communication, 2022. p. 297-301. ISBN: 978-80-214-6030-0.
JEDLIČKA, P.; MALINA, L.; SOCHA, P.; GERLICH, T.; MARTINÁSEK, Z.; HAJNÝ, J. On Secure and Side-Channel Resistant Hardware Implementations of Post-Quantum Cryptography. In ARES '22: Proceedings of the 17th International Conference on Availability, Reliability and Security. Vienna, Austria: ACM, 2022. p. 1-9. ISBN: 978-1-4503-9670-7.
MALINA, L.; RICCI, S.; DOBIÁŠ, P.; JEDLIČKA, P.; HAJNÝ, J.; CHOO, K. On the Efficiency and Security of Quantum-resistant Key Establishment Mechanisms on FPGA Platforms. In 19th International Conference on Security and Cryptography (SECRYPT 2022). 2022. p. 605-613. ISBN: 978-989-758-590-6.
2021
RICCI, S.; MALINA, L.; JEDLIČKA, P.; SMÉKAL, D.; HAJNÝ, J.; CÍBIK, P.; DZURENDA, P.; DOBIÁŠ, P. Implementing CRYSTALS-Dilithium Signature Scheme on FPGAs. In ARES 2021: The 16th International Conference on Availability, Reliability and Security. 2021. p. 1-10. ISBN: 978-1-4503-9051-4.
JEDLIČKA, P. VHDL-Based Implementation of NTT on FPGA. In Proceedings II of the 27th Conference STUDENT EEICT 2021 selected papers. 1. Brno: Brno University of Technology, Faculty of Electrical Engineering and Communication, 2021. p. 136-140. ISBN: 978-80-214-5943-4.
MALINA, L.; CÍBIK, P.; JEDLIČKA, P.; SMÉKAL, D.; RICCI, S.; HRABOVSKÝ, J. Hardware-based Cryptographic Accelerator for Post Quantum Era. In 13th International Congress on Ultra Modern Telecommunications and Control Systems and Workshops (ICUMT). 2021. p. 149-155. ISBN: 978-1-6654-0219-4.
RICCI, S.; JEDLIČKA, P.; CÍBIK, P.; DZURENDA, P.; MALINA, L.; HAJNÝ, J. Towards CRYSTALS-Kyber VHDL Implementation. In Proceedings of the 18th International Conference on Security and Cryptography (SECRYPT 2021). Science and Technology Publications, 2021. p. 760-765. ISBN: 978-989-758-524-1.
2017
JEDLIČKA, P. HLUKOMĚR A DETEKTOR ZVUKŮ. In Proceedings of the 23rd Conference STUDENT EEICT 2017. Brno: Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních, 2017. s. 133-135. ISBN: 978-80-214-5496-5.
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